[an error occurred while processing this directive] [an error occurred while processing this directive] PDP-8 Interrupt Management [an error occurred while processing this directive] [an error occurred while processing this directive] [an error occurred while processing this directive]
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The Digital Equipment Corporation PDP-8

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Interrupts

[an error occurred while processing this directive] Part of [an error occurred while processing this directive] the PDP-8 Programmer's Reference Manual
[an error occurred while processing this directive] See also [an error occurred while processing this directive] (none)
[an error occurred while processing this directive] [an error occurred while processing this directive] (none) Douglas W. Jones [an error occurred while processing this directive] (none)
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THE UNIVERSITY OF IOWA Department of Computer Science [an error occurred while processing this directive] and (none) [an error occurred while processing this directive]

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Index


General

Interrupts are not generally used by OS/8, the most widely used PDP-8 operating system, but they are central to TSS-8 and other PDP-8 based timesharing systems. In addition, many stand-alone PDP-8 applications made extensive use of interrupts.

A device may request an interrupt when it finishes an input/output transfer or reaches a similar ready condition. Typically, each device has a device specific interrupt-enable flipflop that must be set to allow the device to post the request; in addition, the CPU contains a global interrupt-enable flipflop that must be set to allow the CPU to respond to an interrupt.

When the CPU accepts an interrupt request, the effect is as if a JMS instruction was executed to memory location 00000 (word zero fo field zero). Thus, the 12 bit return address is stored in location zero, and execution begins at location one.

In addition to the transfer of control, the global interrupt enable flipflop is reset when an interrupt occurs. If the extended memory option is present, the interrupt buffer is loaded with a record of the memory management state prior to the interrupt, and then both IF and DF are set to zero.

It is up to the interrupt service routine to save and restore all registers other than the PC, which was automatically saved in location zero. In addition, it is up to the program to determine which device requested an interrupt and either service or disable that device's interrupt request.

Under OS/8 (prior to OS/78 and OS/278), the system did not run with interrupts enabled, but individual applicatons could enable interrupts. By convention, it was expected that, on entry to or exit from an application, all devices would be either ready or would soon become ready (after completing an operation). That is, it was expected that all devices would either have done flags set to indicate operation completion, or they would be busy with an operation still in progress.

Thus, under OS/8, the handler for any device typically begins by checking to see if the previous operation was done before initiating a new operation. If an application enables interrupts, all devices will typically immediately request interrupts, and the interrupt handlers must either give the devices work to do or somehow turn off their done flags because no work is available for that device. Prior to exit, such an application would typically disable interrupts and then issue any device commands needed to get all devices to raise their done flags.

Instructions

Formally, the general interrupt management instructions are IOT instructions involving device 0. In addition, each device that may cause interrupts generally has its own interrupt management instructions; unfortunately, the latter are not standardized.

Only two interrupt management instructions are universally available on all PDP-8 models, ION and IOF. All other interrupt management instructions are system specific, although the large majority are uniformly supported by all models after the PDP-8/E.

All instructions that deal with this option are privileged, and the detection and trapping of privileged instructions, if supported, is supported by the Time-Share option that is implemented as a subsystem of some PDP-8 memory management units.

Instructions

6000 - SKON Skip if Interrupt System On

SKON is used to test the state of the interrupt enable flipflop. If interrupts are enabled, the next instruction in sequence is skipped.

SKON is only available on the PDP-8/E and later models. On earlier models, this was a no-op.

6001 - ION Interrupts On

ION is used to turn on interrupts. The effect of this instruction is delayed one instruction so that, for example, an ION instruction immediately before a return instruction will not take effect until the return instruction is executed.

6002 - IOF Interrupts Off

IOF is used to turn off or disable interrupts. The effect of this instruction is immediate. In addition, interrupts are disabled immediately when an interrupt occurs.

6003 - SRQ Skip on Interrupt Request

SRQ is used to test whether there is a pending interrupt request. If a request is pending, the next instruction in sequence is skipped. This test is only meaningful when interrupts are disabled; it may be used, for example, to avoid the expense of an unnecessary return from interrupt when some device other than the one just serviced is also requesting service.

SRQ is only available on the PDP-8/E and later models. On earlier models, this was probably interpreted as a nondeterministic microcoded combination of ION and IOF!

6004 - GTF Get Flags

GTF is similar to RIB, but is only available on the PDP-8/E and later models. This opcode was used for the Type 189 Analog to Digital Converter option on the original PDP-8, so it can cause very strange results if executed on the wrong machine!

GTF loads the accumulator with various information that may need to be saved and restored during interrupts. This includes the link bit, the state of the optional memory management unit, and the greater-than flag from the optional extended arithmetic unit. These are packed into the accumulator in the following format:

            00 01 02 03 04 05 06 07 08 09 10 11
            ___________________________________
           |  |  |  |  |  |  |  |  |  |  |  |  |
           |__|__|__|__|__|__|__|__|__|__|__|__|
           |  |  |  |  |  |  |        |        |
          LINK GT IR II IE  U    IF       DF    
LINK
-- the link bit.
GT
-- the Greater Than bit (see the SGT instruction supported by the extended arithmetic element.
IR
-- the interrupt request status, as tested by SRQ. This is set to one if an interrupt requesting is pending.
II
-- the interrupt inhibit bit associated with the Time-Share option of the memory management unit.
IE
-- the state of the interrupt enable flipflop, as set by the ION and reset by the IOF instructions. This is set to one if interrupts are enabled.
U
-- the user-mode bit.
IF
-- the instruction field.
DF
-- the data field.
U, IF and DF are the same as the corresponding fields returned by the RIB instruction.

6005 - RTF Restore Flags

RTF restores the state of the flags that are saved by the GTF instruction, using the same data format. This instruction is only available on the PDP-8/E and later models; it can cause strange results when used on earlier machines (possibly acting as a microcoded combination of GTF and ION).

RTF ignores the IR (interrupt request) bit that was saved by GTF, and the IE (interrupt enable) bit is not fully restored until the instruction after the RTF instruction, so that a return from interrupt may be executed before the next interrupt request is serviced.

6006 - SGT Skip if Greater Than

SGT is only supported if the extended arithmetic element is present, and then, only on the PDP-8/E and later machines. This instruction skips if the greater than flag is set.

6007 - CAF Clear All Flags

CAF is only supported if the PDP-8/E and later machines. The effect of the CAF instruction is identical to a master clear issued from the front panel. AC and LINK are cleared, interrupts are disabled globally, and all I/O devices are reset. Generally, resetting a device sets the device specific interrupt enable bit and terminates any ongoing I/O activity. Resetting a device may initiate long reset and self-test sequences, and it may leave the device in an odd state, for example when a reset is issued in the middle of a write operation.

Programming Conventions

Note that, even on models where the GTF and RTF instructions are available, interrupt entry and exit can be quite complex, involving multiple instructions to save and restore the accumulator, link, multiplier quotient and step counter. Furthermore, interrupt dispatching, determining which device requested an interrupt, can be difficult because the PDP-8 provides nothing analogous to vectored interrupts.